A necessary step in the fabrication of high performance complementary bipolar or c-BiCMOS transistors is the formation of highly doped co-planar sub-collector regions of both N and P type, with an epitaxial silicon layer disposed thereover. A major problem in the deposition of a silicon epitaxial layer over a highly doped sub-collector region is the evaporative loss of dopants from the region into the CVD chamber, and the resultant unwanted doping of areas adjacent to the region. This problem, referred to as autodoping, has been addressed extensively in the prior art. The avoidance of autodoping is more difficult when both N and P type regions are simultaneously present, because of their different autodoping responses under the same epitaxial process conditions.
The prior art relating to autodoping discusses the need for a suitable cap layer to reduce the out diffusion of the dopants, and describes various process steps for forming such a cap layer. A typical cap layer is a thin layer of epitaxial silicon with low dopant concentration and high resistivity. See for example U.S. Pat. No. 4,696,701 to Sullivan.
Depending on the desired results, the temperature of deposition for epitaxial silicon can be selected to be low (approximately 600 C), medium (approxi- mately 800 C) or high (approximately 1050), and pressure used is typically reduced (approximately 100 torr) or atmospheric. A high vacuum can be used in combination with a low temperature to improve film quality.
A study on autodoping by H. R. Chang reported the difference in the behavior of autodoping between N type impurities such as arsenic and antimony, and P type impurities such as boron (The Journal of Electrochemical Society, Vol. 132, No. 1, ppg. 219-224, August 1986). The study found that the autodoping of boron (P dopant) became worse at high temperature and at slow deposition rates of epitaxial silicon. Under these same conditions the autodoping of arsenic and antimony (N dopants) was minimal. At medium temperatures, the autodoping was minimal for P dopants and high for N dopants. At low temperatures, the autodoping of both N and P dopants are lower; however, the epitaxial silicon films tend to have higher defects than desired for most applications. FIG. 7 shows the autodoping of arsenic and boron measured by the present inventors at different epitaxy deposition temperatures. The data shows that finding common conditions resulting in low autodoping of both boron and arsenic is difficult.
The epitaxial deposition of silicon has been extensively discussed in the literature, especially the process conditions such as precleans, temperature, pressure, flow and gases, and their effect on growth rates and the epitaxy film properties.
Another area wherein autodoping is an important factor is in the manufacture of complementary bipolar and BiCMOS devices, for which highly doped patterned regions of both N and P type are required in the manner described herein above. U.S. Pat. No. 4,830,973 to Mastroianni, for example, shows methods and means for forming merged bipolar and MOS devices, but fails to teach how to avoid the autodoping when both N and P doped regions are simultaneously present and subjected to an epitaxial deposition process.
Chiu et al., (IEDM 1988, p752; also, IEEE Electron Dev. Let. 1990, p123) teaches the fabrication of a self-aligned BiCMOS device by deposition of a thin epitaxy silicon cap layer selectively over an arsenic doped region, followed by non-selective deposition of an epitaxial layer to desired thickness. Next, a boron doped region is formed by implantation through the epitaxy layer. However, the Chiu et al. process suffers from the disadvantage that it is limited to implantation method for doping, and hence can not achieve very high boron concentration (greater than 10*19 atoms/cc). Boron concentration by implantation is usually restricted to 5.times.10*18 atoms/cc to avoid damage to the crystal, whereas higher concentrations are typically desirable. In addition the structure, consisting of the doped regions with an epitaxial silicon overlayer, resulting from this Chiu et al. process, is non-planar.
Thus the present invention recognizes that it would be particularly valuable in the art, especially as it relates to the formation of complementary circuits, to provide a planar device, tightly spaced and highly doped N and P regions, desirably with an epitaxy silicon overlayer, and a method of fabricating such a device with low autodoping from the dopant regions.